KLA Corp. has turned its flagship wafer inspection systems into AI-powered supercomputers, deploying a custom light source roughly twice as bright as the sun's surface to detect microscopic defects inside increasingly complex AI chips.
Ahmad Khan, president of KLA's semiconductor products and customer business (NASDAQ: KLAC), described the technology at the SEMICON Taiwan 2026 Masters Forum on September 2, outlining how the challenge of chip quality control has grown in lockstep with the rise of AI computing.
4PB of Wafer Image Data Filtered Every Single Day
The data volumes involved in cutting-edge chip inspection are staggering. KLA's high-end brightfield inspection systems generate roughly 125 terabytes of image data per hour, Khan said — amounting to approximately 4 petabytes per day. Every byte must be processed in real time, pixel by pixel, as the scanner sweeps across each wafer.
"We cannot store all the data. We have to process it as it is generated," Khan said. The system draws on graphics processing units (GPUs), high-bandwidth memory (HBM), CPUs, and solid-state drives, combining AI foundation models with physics-based algorithms to sift through the torrent. By the end of the filtering pipeline, the daily 4PB deluge is narrowed down to roughly 100 candidate defect events — a volume small enough for engineers to triage.
Central to achieving the image clarity needed for that analysis is the light source itself. KLA's broadband plasma inspection technology uses a proprietary high-brightness broadband illuminator with a brightness approximately twice that of the sun's surface, generating sufficient signal to resolve extremely small or low-contrast anomalies that would otherwise go undetected.
AI Chips Run 24/7, Demanding a Higher Defect Standard
Traditional wafer inspection focused on killer defects — flaws that cause chips to fail functional tests outright. AI accelerators have raised the bar considerably. These processors run continuously under sustained heat and heavy workloads, and subtle anomalies that pass initial electrical testing can still degrade or fail over time in the field.
Khan illustrated the stakes by describing the architecture of a modern AI system package: two compute dies paired with eight HBM stacks, with each stack comprising 12 to 16 memory die layers. A defect at any point in that structure — a die, a bonding interface, or an interposer — can compromise an entire high-value package worth thousands of dollars.
This has pushed wafer inspection beyond failure detection and into risk management: identifying defects that are latent today but may become reliability problems tomorrow. Khan noted that AI chips, operating at maximum capacity around the clock, are especially sensitive to such latent flaws — faults that consumer electronics would rarely stress enough to surface.
Physics Algorithms Remain Essential Alongside AI Models
AI has become indispensable for processing the flood of inspection data, but Khan cautioned that machine learning models alone are insufficient. Advanced chips vary widely in geometric structure, optical properties, and process conditions — variability too complex for data-driven models to manage reliably without additional grounding in physics.
KLA's approach pairs AI foundation models with physics-based algorithms, which Khan said is essential to reducing false positives while maintaining inspection speed. The broader implication, in his framing, is that AI is playing a dual role in the semiconductor industry: it is simultaneously the driver of unprecedented inspection complexity and a key tool for managing it.
